PDF) Survival analysis for modeling critical events that communities may undergo in dynamic social networks
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PDF) An adaptive BIST to detect multiple stuck-open faults in CMOS circuits
PDF) Modeling and Simulation of Efficient March Algorithm for Memory Testing
Education and Information Technologies | Home
PDF) A domain-specific approach for software development on Manycore platforms
PDF) High-Level Test Synthesis for Delay Fault Testability
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
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PDF) Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata
PDF) On the generation of pseudo-deterministic two-patterns test sequence with LFSRs.
PDF) Moduli Set Selection and Cost Estimation for RNS-Based FIR Filter and Filter Bank Design
PDF) Memory testing with a RISC microcontroller
PDF) Detection of Delay Faults in Memory Address Decoders
PDF) Detection of Delay Faults in Memory Address Decoders
PDF) Extending Internet into Space – ESA DTN Testbed Implementation and Evaluation
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Steffen Tarnick's research works | Universität Potsdam, Potsdam and other places
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PDF) UHF Receiver Front-End: Implementation and Analog Baseband Design Considerations
PDF) Test pattern generation based on arithmetic operations
PDF) Test Embedding with Discrete Logarithms
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) Accumulator-Based Weighted Pattern Generation.
PDF) A Context-Aware Meeting Room: Mobile Interaction and Collaboration Using Android, Java ME and Windows Mobile
PDF) Efficient Test Compaction for Pseudo-Random Testing
PDF) Concurrent Self-Test with Partially Specified Patterns For Low Test Latency and Overhead
